Technical Field
The present invention relates to semiconductor processing, and more particularly to methods for forming Si and SiGe fins on a dielectric layer using a bulk wafer.
Description of the Related Art
Many fin field effect transistor (finFET) processes begin by using thick silicon-on-insulator (SOI) substrates. The processes typically protect N-type field effect transistor (NFET) devices with a SiN hard mask, and fins in an area for P-type field effect transistor (PFET) devices are etched. A high quality undoped SiGe epitaxy is performed to selectively grow SiGe on the etched fins. After the hard mask is stripped from the NFET area, fin patterning and reactive ion etching (RIE) are performed. In many processes, Ge diffuses into NFET areas, which degrades performance of the NFETs. Using the SOI substrate can result in leakage to a base substrate. In addition, before SiGe growth, corners of the fins are susceptible to etching before the SiGe is grown.